Low-Temperature Modelling of Electron-Velocity-Overshoot Effects on 70-250 nm Gate-Length MOSFETs

Modelling of the increase of MOSFET transwnductance produced by electron-velocity overshoot as channel lengths are reduced has been performed at low temperature. The results obtained have been compared to room-temperature ones. To accomplish this, the charge-control model has been used to obtain a simple analytical expression to account for electron-velocity overshoot effects on the performance of very short channel MOSFETs. This model can be easily included in circuit simulators of systems with a huge number of components. Experimental verification of the accuracy of this model is provided. The improvement of MOSFET transconductance due to electron-velocity overshoot is found to be greater at low temperature than at room temperature. MOSFET transconductance, g,, is known to be one of the most important figures of merit in dealing with the large-signal switching performance of logic devices, as the time constant for a small MOSFET to charge a load is proportional to Clg,, where C is the node capacitance. That is why accurate modelling of this parameter is essential in circuit simulators of state-of-the-art MOSFETs [l]. The continuous reduction of the dimensions of these devices makes the carrier transit time comparable to the energy relaxation time 121, thus causing electron-velocity-overshoot effects. Therefore, this fact has a great influence on the performance of very short channel MOSFETs, mostly at low temperature. 2.CHARGECONTROL MODEL We have taken into consideration the velocity-overshoot effects on the transconductance of short channel MOSFETs by using a local augmented drift-diffusion model for the electron velocity based on Thornber's equation 131. This has been done by adding a term dependent on the longitudinal electric field gradient, which has been found to be the main cause of electron-velocity overshoot [4,5] (Expression 1): We have corrected the stationary velocity vs. longitudinal electric field curves using Equation 1 to fit the velocity profiles obtained using a MOSFET Monte Carlo simulator 161. A value of h=6.4x105 cm3/Vs (T=77K) was found to work well for a wide sample of 100-1000 nm channel length MOSFETs at different operating conditions. This expression has also been found to work well in our drift-diffusion simulator, reproducing the experimental behaviour that transconductance shows as the length of the Article published online by EDP Sciences and available at http://dx.doi.org/10.1051/jp4:1996302 Q-14 JOURNAL DE PHYSIQUE IV MOSFET channel is reduced. Taking this as a starting point, we have used the charge control analysis to get a closed expression for the transconductance. We suppose that the source is located at x=O and the potential at that point is zero; the drain is assumed to be at x=L, where L is the effective channel length, at a potential at V,. The drain current can be calculated as a product of the mobile channel charge (which is a function of the gate-source voltage and the local channel potential V(x)), the channel width, and the electron velocity along the X axis, from the source towards the drain (given by Expression 1): At this stage some simplifying assumptions are made: we take an average value p for the lowlongitudinal-electric-field mobility corresponding to an average value of the transverse electric field along the channel. This is not a rough approximation for lowand medium-drain voltages; we also take /3 = l. Under these assumptions we get We integrate the previous expression making use of the mean-value theorem for the second term in brackets and a simple variable change for the rest. The result is given by where the mean value is shown in angles for the above expression, and the function F(V,,,V,) is the integral of the inversion charge in the channel: This expression contains the differences between the different field-effect transistors, and so changing the expression for Q(V)dV would be enough to model these effects in other FET (MOSFETs, HEMTs, MESFETs, etc). The expression in angles is very high near the drain compared to the value of this expression in other zones of the channel and the value of the inversion charge that multiplies this value in the integral is higher near the source than in the rest of the zones closer to the drain, so there is no zone of the channel where the integrand is clearly dominant. Therefore, we will employ a semiempirically modified mean value along the channel for the expression in angles. To do so, we approximate the first and second derivative of the electrostatic potential as follows: where "a" is a constant. The transconductance obtained after these considerations is given by In accordance with the above calculation, it is obvious that the quotient of the transconductance, accounting and not accounting for the effects of velocity overshoot, can be calculated as In order to check this expression, we have calculated the ratio between experimental "intrinsic" transconductances measured for a sample of MOSFETs fabricated by G. A. Sai-Halasz et al. [7] and the same transconductances calculated by these authors using a classical drift-diffusion simulator with VG,V,=0.6 V, V,=0.8 V, p=390 cm2/Vs, v,,=8x106 cm/s at T=300K and p=720 cm2/Vs, v,=1x107 cmls at T=77K. The same ratio, calculated using Equation 8 for the same parameters, is shown in solid line for a=6.25 and X=4~10-~cm~/Vs (T=300K) and X=6.4x1Q5 cm3/Vs (T=77K) (Figure 1). Channel length (,urn) Figure 1: Roomand low-temperature ratio between experimental "intrinsic" and simulated transconductances versus channel length (solid line). The same ratio calculated analytically by Equation 8 is shown in solid squares. As can be seen in Figure 1 the relative improvement of the transconductance is important for MOSFETs with a channel under 0.15 pm. The low-temperature ratio is higher than the room-temperature one for all channel lengths; comparison of the two curves shows that the low-temperature ratio is higher than 15% for channel lengths under 0.1 pm. We have also tried to reproduce the experimental transconductances by applying Equation 7. To do so, we fit the measurements by G. A. Sai-Halasz et al. using Equation 7 and an estimated value for the partial derivative of F(VGs,VDs). To get this estimated value we took as a starting point a general expression for the absolute value of the inversion charge per unit area in MOSFETs [g]: JOURNAL DE PHYSIQUE IV where C,, is the oxide capacity per unit area, V,, is the flat-band voltage, $, is the surface potential and Q, the depletion charge per unit area. The voltage between substrate and source was zero. Therefore we can substitute V, by V,. In strong inversion, the surface potential can be approximated by $,(X) = &+V(x) along the channel, where 4, equals 2+,+64, (ed, is the difference between the Fermi level and the intrinsic Fermi level in the bulk in eV, and 4t=KT/e, K being Boltzmann's constant). If we substitute this value of the surface potential in strong inversion (which is the case here) in Equation 9, if Q, is represented only by its value at the source, if its variation along the channel is neglected, and if the definition of threshold voltage is used [g], we obtain: Therefore with regard to the definition of function F(VGs,VDs), Equation 5, an estimated value of the partial derivative of F(VGs,VDs) can be easily obtained: The value given by G.A. Sai-Halasz et al. for the oxide width was 4.5 nm, so for the bias reported before V,,-VT=0.6 V and V,,=0.8 V, the estimated value of the partial derivative of F(VGs,VDs) is 6 .1~10~' C/cm2. The values used to fit the experimental "intrinsic" transconductances for the partial derivative for F(VGs,VDs) were 5 . 2 ~ 1 0 ~ C/cm2 at T=300K and 5.5x10-' C/cm2 at 77K. A perfect fit can be observed in both cases (Figure 2) . 200 1 I O Chonnel length (@m) Oe3 Figure 2: Roomand low-temperature experimental "intrinsic" tranxonductances versus channel length and modelled transconductances calculated by means of Equation 7. As can be observed the increase of experimental transconductances over theoretical ones (drift-diffusion simulated) is higher at low temperature. This is produced by a lower electron-phonon interaction which increases the energy relaxation time, making velocity overshoot more likely. A higher X is obviously needed in this case, which means that in order to improve MOSFET-performance features connected to velocity overshoot-effects, low temperature operation is recommended. To see what the contribution of the new term to the previous one is more clearly, as MOSFET channel length is reduced, we have plotted them versus channel length as they appear in Equation 7, adjusting for channel width and aF(VGs,V,d/aVGs normalization at T=77K.